Verilog Beautifier
Posted: Tue Dec 26, 2006 3:25 pm
This is the first part in making a Verilog beautifier in Zeus.
This script will format input/output/inout/reg/wire lines with and without a range modifier.
To change the column where the signal name will be placed, change the line in the script 'local col = xx'
The script runs on the marked area.
Amit
This script will format input/output/inout/reg/wire lines with and without a range modifier.
To change the column where the signal name will be placed, change the line in the script 'local col = xx'
The script runs on the marked area.
Code: Select all
function key_macro()
-- set the new column for the signal name
local col = 17
--
if (is_read_only() == 1) or (is_document() == 0) then
message("This macro can only be used with a writable document.")
beep()
return
end
if (is_marked() == 0) then
message("To use this macro you need to first mark some text.")
beep()
return
end
local first = get_marked_top()
local last = get_marked_bottom()
local result = ""
local line,nline,idx,idx2
for i = first, last do
line = get_line_text(i)
-- drop leading white space
idx = string.find(line,"%S")
if idx ~= nil then
nline = string.sub(line,idx)
-- Get keyword
idx = string.find(nline,"%s")
local keyword = string.sub(nline,1,idx-1)
if (keyword=="input") or (keyword=="output") or (keyword=="inout") or (keyword=="reg") or (keyword=="wire") then
-- check if a range exists
idx = string.find(nline,"%S",idx)
if string.sub(nline,idx,idx) == "[" then
idx2 = string.find(nline,"%s",idx)
range = string.sub(nline,idx,idx2-1)
idx = string.find(nline,"%S",idx2)
nline = keyword .. string.rep(" ",col-2-string.len(keyword)-string.len(range)) .. range .. " " .. string.sub(nline,idx)
else
nline = keyword .. string.rep(" ",col-1-string.len(keyword)) .. string.sub(nline,idx)
end
result = result .. nline .. "\r\n"
else
result = result .. line .. "\r\n"
end
else
result = result .. line .. "\r\n"
end
end
set_clipboard_text(result)
MarkPaste()
end
key_macro()